2012-07-30 10:30

  Fully registered inputs and outputs for pipelined operation
  128 K × 36 common I/O architecture
  3.3 V core power supply (VDD)
  2.5- / 3.3-V I/O power supply (VDDQ)
  Fast clock to output times:2.6 ns (for 250 MHz device)
  User selectable burst counter supporting Intel Pentium interleaved or linear burst sequences
  Separate processor and controller address strobes
  Synchronous self timed writes
  Asynchronous output enable
  Offered in Pb-free 100-Pin TQFP, Pb-free and non Pb-free 119-Ball BGA package
  “ZZ” sleep mode option and stop clock option
  Available in Industrial and commercial temperature ranges